Teaching

Research

Other Links

 

CPSC498 Senior Project

Spring 2006

                        CPSC 498 Syllabus, include requirements of proposal, progress report, final report

Integrated Circuit/Embedded System Design Lab 

 

Lab equipments and tutorial (some links have been updated after Spring 2006  )

·   Spartan S3E Starter Board User Test  www.ece.vt.edu/cel/help/S3E-User-Test.pdf

·   Portalk: Spartan-3 Starter Kit Board Parallel Port Interface, to emulate an unlimited number of I/O signals between the FPGA and a laptop or desktop computer, http://www.mit.edu/~ebakke/parint/

·   Spartan 3 Decoder Tutorial (For Xilinx synthesis to Spartan 3 board) – equivalent Verilog tutorial

o  Spartan 3 Demo Tutorial – similar to Spartan 3 Decoder Tutorial but also shows how to program the PROM

·   Spartan 3 Counter Tutorial (For Xilinx synthesis to Spartan 3 board) – equivalent Verilog tutorial

·   Spartan 3E LCD filesread me (Use these files to provide a 4 digit display on the Spartan 3E starter board)

·   Encoder implementation and simulation (VHDL and Verilog)

·   StateCad Tutorial

·   Using CoreGen and Chipscope

·          FPGA Prototyping ByVerilog Examples, Xilinx Spartan-3 Version (Hardcover)

    Pong P. Chu (Author) ,ISBN-10: 0470185325

·          Test processor on hardware: hardware tutorial

·          Behavioral testbench to test processor. testbench

·          Ece274, Dr. Roman Lysecky,, using Dr. Vahid book http://www.ece.arizona.edu/~ece274/

·          XUP Virtex II board tutorial
                           Installing USB Cable Drivers       
                           Workaround iMPACT problem

                          Xilinx Virtex Pro development system

·          The Elements of Logic Design Style by Shing Kong, 2001.

·          ModelSim Simulation Tutorial

·          UCF Generators for Spartan-3, XUPV2P Board and Peripherals, PicoBlaze Embedded Processor

·          Digilent Spartan-3 Starter Kit from PLD-Oasis, Very good!!

·          Xilinx Spartan III board

·          NC-Verilog SimVision and ModelSim

·          Design Project Tips, trouble shooting tips

·          Opencores.org

·          http://sourceforge.net/

·          Safety Memo [PDF]

·          Harvard Xilinx Dilemmas , Debugging with ChipScope

·          Unix, Synopsys tips: http://www.chiptalk.org/modules/wfsection/article.php?articleid=10

 

Project topics

·          Embedded Processor/ System on Chip design using Xilinx Spartan III with picoBlaze core

1.      PicoBlaze from CPE269 at Calpoly San Luis Obispo,

2.      ECE533 at Rose-Hulman Institute of Technology, Programmable Logic Systems Design “educates students in the fundamentals of systems-on-chip (SoC) design”

3.      EE178: http://www.engr.sjsu.edu/crabill/, EE178 uses a soft processor as a component, it should be considered as system level work.

4.      System on Chip ee571: http://www.cse.ogi.edu/class/ee571/

5.      E168b: HW/SW Codesign for Wireless

6.      Interfacing the AT keyboard, using 68HC705J1A MCU: http://www.beyondlogic.org/keyboard/keybrd.htm

7.      Using the Spartan-3E Starter Board LCD Display: http://www.cosmiac.org/pdfs/09Tutorial6.pdf

 

·             Low power integrated circuit design

1.      Why power is important,

2.      The Alliance to Save Energy,  Price of Performance, by Luiz Andre, Google, Energy Star (United States government program to promote energy efficient consumer), Energy and Environment, http://www.hpac.com/Issue/Article/44475/Refrigerant_Data_Update.( Visit the Environmental Defense Fund informational site - find out what pollution/polluters are present in any area of the country (either by entering a zip code or clicking a map of the country).

3.      The Association of Energy Engineers  http://www.aeecenter.org/

4.      Global annual energy used to transmit, process  and filter spam is 33 billion kilowatt-hours(kWh) http://www.eweek.com/c/a/Midmarket/McAfee-Looks-at-Spams-Damage-to-Environment-533463/

5.       CPU power dissipation

Green computing

Efficient energy use
Average Power Consumption of Household Appliances   
ESTIMATING TOTAL POWER CONSUMPTION BY SERVERS IN THE U.S. AND THE WORLD

 

·          CRC(Cyclic Redundancy Check) integrating with UART

·          Navigation using RFID
              Handyboard at Wellesley College
             

Embedded design/ Integrated circuits design Projects/Classes of Other Universities

·         Embedded System Design: A Unified Hardware/Software Introduction

·         Microprocessors, From Assembly Language to C Using the PICI8FXX2, by Dr. Robert Reese

·         High Speed Digital Design, signal integrity issue, PCB, EMC resource

·         Network Communication project of RS232 ECE 491 by Dr. John A. Nestor

·         Harvey Mudd College
CMOS VLSI Design, A Circuits and Systems Perspective book website
Digital Design and Computer Architecture: From Gates to Processors, http://textbooks.elsevier.com/0123704979

 

·         EE571/671 System-on-Chip Design with Programmable Logic

·            EE577/677 Applied Hardware Verification

·            EE572/672 Advanced Digital Design: Timing and Test  

·         Porting Linux to XUPV2P Jamie's Research @ WSU

·         Embedded system design in Columbia University, has video games

·         Video game Colin college, very good VGA       http://ca.olin.edu/2005/fpga_sprites/results.htm

·         RFID project  

·         Opencores.org

·         Programming tips including link to perl tutorial

·         Sams Teach Yourself Shell Programming in 24 Hours

·         University of Los Angeles, Embedded Security Group

·         University of Michigan, Design / Automation Lab leakage, bus encoding, level conversion, etc

·         Low power system on chip, Dr. Wei Hwang, flip flop, domino, MAC, etc

·         EDA lab by Dr. Lei He , UCLA (Leakage, layout and power estimation)

·         UC Davis, ACSEL LAB          

·         University of Southern California, Dr. Pedram Low Power design

·         http://www.ece.ncsu.edu/asic/2006/notes.htm     Digital ASIC design

·         http://www.ece.ncsu.edu/asic/2005/lect05/Lectures.htm

·         http://www.ece.ncsu.edu/asic/2005/resources/Resources.htm  Verilog Synopsys error

·         http://www.ece.ncsu.edu/asic/2006/notes.htm     Verilog error

·         Verification: http://www.ece.ncsu.edu/asic/2006/docs/Verify2up.pdf

·        Verilog synthesize tricks and techniques, ECE 520 :         http://www.ece.ncsu.edu/asic/2006/docs/techniques2up.pdf

·         http://www.ece.ncsu.edu/armm/ARMM_Graduate.htm Course suggestion from NCSU

·         http://www.ece.ncsu.edu/armm/Digital_VLSI_POW.htm Digital circuit design course suggestion from NCSU

·         http://www.cs.unc.edu/~lastra/Courses/COMP290_F2005/description.html COMP290 Graphics Hardware

·         University of Stanford ee 371 , Stanford VLSI research projects

·         UC Berkeley ee 241

·         Courses at MIT: http://ocw.mit.edu/OcwWeb/Electrical-Engineering-and-Computer-Science/index.htm

·         Dr. A. Mason EE 410S05

·         Dr. Reese ECE 8273

·         http://www.rose-hulman.edu/~simoni/Classes/EC551/ec551.html

·         Computer Architecture, Arithmetic and CAD Research Group at by Dr. James Stine

·         Project Tips

·         Harvey Mudd College
CMOS VLSI Design, A Circuits and Systems Perspective book website
Digital Design and Computer Architecture: From Gates to Processors, http://textbooks.elsevier.com/0123704979

·         Cadence Repository for Electronic Technical Education

·         Intel VLSI Curriculum

·         San Jose State University: http://www.engr.sjsu.edu/~dparent/ICGROUP/index.htm

·         University of Tennessee: 12-cell standard cell library which can be  fabricated  on  the MOSIS   educational  runs 

·         Olin College VLSI

·         FPGA vs. DSP http://students.olin.edu/2007/acollege/ca/materials/slides.ppt

Verilog topics

· Verilog combinational from MIT 6.111, Verilog sequential

· Stanford University FAQ: Verilog (Verilog

  Wiring Tips -- useful for project

)

· Finite state machine 1 from MIT, FSM 2, FSM 3, SJSU EE 178, FSM for cpu from UC Berkeley

· Memory from MIT 6.111, Memory timing UC Berkeley

· FPGA Verilog Design Flow

· Trouble shooting synthesis

· Simulating Verilog RTL using Synopsys VCS

· Cliff Cummings' Papers on Verilog

· Synthesizable Verilog Programming Conventions and Resources

· Gradual Introduction to Verilog Syntax: Basic Sequential Circuits

· Synthesis design rules

· Behavioral Model of a Microprocessor

· Datapath Synthesis and Optimization for High-Performance ASICs

· Hints for Verilog and Synthesis

· NC Verilog SimVision - ModelSim

· Magic Verilog Synthesis

· FPGA research by Dr. Lei He , UCLA (Leakage, layout and power estimation)

· Computer organization-Instruction trace from UC Berkeley

· Verilog hints : http://www.stanford.edu/class/ee108b/labs/verilog_hints.htm

· Tips: Stanford EE183 Advanced Logic Design Lab

· Design for speed tips: http://kalen.brunham.net/fdesign.html

· Troubleshooting Altera, Cadence http://www.ami.ac.uk/students/itconfig/using-cad.asp

· Troubleshooting Quartus http://www.cl.cam.ac.uk/Teaching/current/ECADArch/trouble.html

· Verilog good examples

· ASIC design and verification top 10 list (Adding monitor)

· FAQ(pass parameter to simulation, `ifdef, $readmemb, etc)

Some Labs from CPSC 466(Integrated Circuit design), copied here for convenient to access tutorials:

Lab1 Path Setup, Magic tutorial

Lab4 Circuit simulation and optimization using Hspice and Awave from Synopsys

Hspice input file: right click and download, then put in your directory

AWAVE to view output

Hspice Awave tutorial (good)

Lab5 Latch and Flip-Flop Simulation with Unix Shell

Lab6 Decoder design due Dec.3

Lab7 MOSIS pad frame and CIF file for chip fabrication

Magic Tape out notes      
How to use the pads       
Create MOSIS account, MOSIS Customer Agreements and Access Forms         

MOSIS Reference Library: MOSIS FAQs, MOSIS Technical Notes, Resources on the Internet, VLSI Text Book Recommendations

Tilos algorithm for sizing:           
http://www.ece.msstate.edu/~reese/EE8273/lectures/timeopt/timeopt.pdf#search=%22Tilos%20algorithm%20reese%22


HSPICE/ SPECTRE

·      HSPICE quick reference

·      HSPICE Tips Document by Rhett Davis from UC Berkeley eece 141

·   HSPICE tutorial
http://homepages.cae.wisc.edu/~kime/555/tutorials/hspice/spc_tut.pdf

·   A brief guide to HSPICE: sweep , find-when, etc
http://www.ee.tufts.edu/r/nanolab/hspice.html

·   Measure power in HSPICE

·   Measuring Digital Properties using Spectre
http://www.ece.iit.edu/~vlsi/cadence/spectre4.html

·   Tips for Converting Level 49 HSPICE models to Level 7 PSpice models


VLSI Design Flow

·         Top down Standard cell ASIC design: How to use a Standard cell (ASIC) Design approach (vhdl or verilog to physical)

·         Bottom up Full Custom design: Tale of an IC Engineer

·         Design flow (HDL and chip level )

·         Design flow (logical physical level

·         Jazz Foundry Assisted COT design flow:                  http://www.jazzsemi.com/images/process_technologies/FAsCOT-Flow.gif

STANDARD CELL LIBRARY

·   Survey of standard cell libraries by Graham Petley

·   Links from IIT

·   Library Architecture Challenges for Cell-Based Design, Intel

·   Creating a LEF file for Silicon Ensemble from IIT

·   From stick diagram to layout: http://www.stanford.edu/class/ee271/stick_to_layout/stick_to_layout.html

·   Layout suggestions:
http://bwrc.eecs.berkeley.edu/Classes/ICDesign/ee141_f01/grade/faq/layout_common_sense.htm

·   Tutorial for Standard Cells Library from Utah EE 5710:
http://www.cs.utah.edu/classes/cs5710/tutorials/tutorial03.htm


MOSIS

Verilog of other university classes

·         http://www.ece.ncsu.edu/asic/2005/resources/Resources.htm  Verilog Synopsys error http://www.ece.ncsu.edu/asic/2006/notes.htm

·          The Elements of Logic Design Style by Shing Kong, 2001.

·         UC Berkeley CS 150:

http://www-inst.eecs.berkeley.edu/~cs150/fa02/calendar.html

http://www-inst.eecs.berkeley.edu/~cs150/fa02/handouts/7/Lab/lab6.pdf debugging

http://inst.eecs.berkeley.edu/~cs150/fa05/Labs/Lab4.pdf debugging more
http://www-inst.eecs.berkeley.edu/~cs150/fa02/handouts/8/LectureB/lec16-memory- 2up.pdf memory

·         http://www-inst.eecs.berkeley.edu/~cs150/fa05/Lectures/06-SeqLogicIIx2.pdf

·         Logic Design , San Jose State University      

·         Geroge Tech ECE2030F-spring2003

·         Dr. Kuang weidong Teaching

·         Rapid prototyping Georgia James Hamblen

·         DSP-FPGA Primer; University of Strathclyde (Syllabus. Contact Xilinx for course material)

·         EDK, MPEG 2 System On A Chip; Brigham Young University

·         Digital Design (EE 108 a), Stanford University

·         Digital Design (EE 108 b) , Stanford University

·         Advanced Digital Design, Stanford University

·         MicroBlaze and Micro CLinux; University of Queensland

·         Introductory Digital Systems Laboratory using the FPGA "Nerd" Lab Kit MIT

·         http://www.eecg.toronto.edu/%7Epc/courses/432/2004/

·         http://www.cs.ualberta.ca/~amaral/courses/329/

·         Network Processing; Stanford University

·         http://www.fpga-faq.org/archives/75225.html

·         http://www.nuhorizons.com/sp3/

·         http://www.itee.uq.edu.au/~design/software/xilinx_tut4/ DIO5 LCD

·         http://www.emulation.com/

·         Making your design 50% smaller http://www.ee.byu.edu/class/ee320/lectureNotes/Get%20Your%20Priorities%20Right.pdf

Verilog HDL / VHDL Tutorial

·         Structural Design with Verilog By David Harris

·         Verilog Online Reference Guide

·         Verilog FPGA http://www.stanford.edu/class/ee183/handouts.shtml

·         Verilog examples use $readmemh, ifdef

·         Synthesis design rules            
http://www.rose-         hulman.edu/~doering/PLD_Oasis/design_rules.htm

·         Troubleshooting:
http://www.rose-hulman.edu/~doering/PLD_Oasis/troubleshooting.htm

·         Gradual Introduction to Verilog Syntax: Combinational Circuits

·         Gradual Introduction to Verilog Syntax: Basic Sequential Circuits

·         Verilog Xlinix http://www.engr.sjsu.edu/crabill/

·         Verilog quick reference:                    http://www.stanford.edu/class/ee108b/labs/VerilogQuickRef.pdf

·         Verilog links: http://www.asic-world.com/verilog/verilinks.html

·         VHDL Tutorial: learn by example

·         A VHDL Tutorial


Other links

·         Microelectronics News

·         IEEE Transaction on Very Large Integrated Systems
submission

·         IEEE International Symposium of Circuits and Systems: http://www.slrc.kyushu-u.ac.jp/iscas05/

·         IEEE Microelectronics Education Conference: www.mseconference.org/mse05cfp.pdf

·         ICSVLSI – IEEE Computer Society Annual Symposium on VLSI

·         IEEE International Midwest Symposium on Circuits and Systems

·         IEICE transaction

·         Shanghai Integrated Circuit Center Shanghai Research Center for Integrated Circuit Design

·         System On Chip 03: http://www.savantcompany.com/SoC3-Fall2005/agenda3.htm

·         Gigascale Silicon Research Center at Berkeley

·         Programmable System-on-a-Chip

·         MicroSystems Research Laboratory at Penn State

·         VLSI Research Group University of Toronto

·         Links to VLSI information

·         MPL's SCMOS RELEASE (Microsystems Prototyping Laboratory)

·         Magic

·         MOSIS

·         Engineering Information

·         Semiconductor Research Corporation

·         Semiconductor Industry Association

·         SystemC Org

·         SuperLog Org

Electric Circuit

·         Fundamentals of Electric Circuits MHHE Online Product Registration

·         Electric circuits introduction

·         Electrical circuits review

·         Lessons In Electric Circuits, a free series of textbooks on the subjects of electricity and electronics

·         Electronic Engineering http://www.myke.com/pic-book.htm

Miscellaneous

· Price of Performance, by Luiz Andre, Google

·Energy Star (United States government program to promote energy efficient consumer)

·Semiconductor Research Corporation, research needs document

·International Technology Roadmap for Semiconductors 2005 Edition, 2006 Update

·IC design challenges

·Oscilloscope tutorial

·An Intuitive Description of The Logic Analyzer

·Logic analyzer and Digilent XCR board CPE 169 EXPERIMENT SEVEN

·Logic analyzer: http://web.mit.edu/6.111/www/s2006/handouts/quick_la.html

·Computer and logic analyzer / separate interface: http://www.ee.calpoly.edu/cpe-169/CPE%20169%20Lab%20Equipment.pdf

·Watch Me to see what  the devices look like, and to learn proper handling techniques to avoid ESD damage]          

·Introduction to Digital Electronics and Lab Equipment (Logic Analyzers, Digital Oscilloscope, and FPGA-based Labkit): http://web.mit.edu/6.111/www/s2006/LABS/LAB1/lab1.pdf

·Practical Tips for Building and Testing Combinational Logic Circuits and Clocked Circuits

·debounce.v

·Circuit Pitfalls. Intel Corporation. jstinson@stanford.edu       

·Some Unix Commands

·Unix 10 minutes: http://freeengineer.org/learnUNIXin10minutes.html

·Interesting movies: The Shape of Phones
As cell phones continue to shrink and the demand for additional features like cameras, music and email continues to grow, every millimeter counts.  Show your students how the designers and engineers at Motorola rely on math to make everything fit.Watch the Movie: http://www.thefutureschannel.com/dockets/hands-on_math/the_shape_of_phones/index.php

·Tomislav Stimac, "Definition of frequency bands (VLF, ELF... etc.)". IK1QFK Home Page (vlf.it).

·Radio, light, and sound waves, conversion between wavelength and frequency

·RF eBooks - Some free RF related eBooks

·RF and Telecommunication eBooks Retrieved from "http://en.wikipedia.org/wiki/Radio_frequency"

·Hands on Python: Contents

·Python links: http://bulba.sdsu.edu/docwiki/PythonLinks

·Python beginner’s guide: http://wiki.python.org/moin/BeginnersGuide/Programmers

·Python Essential Reference (2nd Edition) (Paperback) concise